Technology thesis · Semiconductors & Chips
medium conviction growthRISC-V
RISC-V already dominates embedded silicon; the open question through 2027 is whether Tenstorrent, Ventana and SiFive can make datacentre-class cores competitive with Arm Neoverse.
Position maintained continuously · last reviewed Jun 24, 2026
The thesis
Core thesis
RISC-V eliminates licensing fees and enables custom chip design. China is aggressively adopting RISC-V as a way to escape ARM licensing and x86 patent restrictions. Alibaba's Xuantie, SiFive, and Tenstorrent are leading RISC-V chip designers. The architecture is proven for embedded/IoT; the open question is whether it can compete in high-performance computing.
State of the art (2026)
RISC-V is entrenched in high-volume embedded silicon - storage controllers, IoT, MCUs - and is now pushing into application-class compute. The RVA23 application profile (ratified October 2024) gives OS distributions a single 64-bit target, and the RISC-V Server Platform spec is in final ratification, unlocking certified Linux servers. SiFive raised a $400m Series G in April 2026 at a $3.65bn valuation, its last private round before a planned IPO, while Tenstorrent, Ventana and Rivos race datacentre-class cores against Arm Neoverse. China is the structural accelerant: T-Head, StarFive and Loongson treat RISC-V as sanctions-resilient infrastructure. The soft spot is consumer mobile - Google pulled RISC-V from the Android common kernel in May 2024, leaving no mainstream phone path.
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Signal stack
Evidence stacked leading → lagging
Technology-native KPIs
Metrics that predict trajectory, tracked over time
Landscape map
Who builds what — and who depends on whom
Catalyst calendar
Dated events that will move the position
Technology roadmap
Milestones on the path to maturity
Watchlists
Companies, people and papers — each with a remove-by condition
Decision frameworks
The same call, framed for your desk
Thesis changelog
When our view changed, and why
Change our mind
3 disconfirming conditions
The rest is inside
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The full signal stack, technology-native KPIs tracked over time, the landscape of who depends on whom, the dated catalyst calendar, decision frameworks for every desk, live watchlists and the changelog of every time our call on RISC-V has changed — all live inside CanaryIQ.